Optimum buffer size for dynamic voltage processors


Manzak A., Chakrabarti C.

INTEGRATED CIRCUIT AND SYSTEM DESIGN, cilt.3254, ss.711-721, 2004 (SCI İndekslerine Giren Dergi) identifier identifier

  • Cilt numarası: 3254
  • Basım Tarihi: 2004
  • Dergi Adı: INTEGRATED CIRCUIT AND SYSTEM DESIGN
  • Sayfa Sayıları: ss.711-721

Özet

This paper addresses the problem of calculating optimum buffer size for a dynamic voltage scaling processor. We determine the minimum required buffer size giving minimum energy solution for periodic (single, multiple) or aperiodic tasks. The calculations are based on information about data size (maximum, minimum), execution time (best case, worst case), and deadlines.