Design of Current-Mode versatile Multi-Input analog multiplier topology


Unuk T., ARSLANALP R., Tez S.

AEU - International Journal of Electronics and Communications, vol.160, 2023 (SCI-Expanded) identifier

  • Publication Type: Article / Article
  • Volume: 160
  • Publication Date: 2023
  • Doi Number: 10.1016/j.aeue.2022.154493
  • Journal Name: AEU - International Journal of Electronics and Communications
  • Journal Indexes: Science Citation Index Expanded (SCI-EXPANDED), Scopus, Academic Search Premier, Applied Science & Technology Source, Compendex, Computer & Applied Sciences, INSPEC
  • Keywords: CMOS translinear circuit, Current-mode, Differential type class AB, Multi-input multiplier
  • Süleyman Demirel University Affiliated: Yes

Abstract

© 2022In this paper, a novel n-input 2n orthant class-AB current-mode multiplier topology is presented. The proposed analog current-mode multiplier is implemented by using two basic blocks, which are a current splitter and a one-quad multiplier. These blocks are based on the translinear circuit principle. Moreover, the designed multiplier can be easily extended for multi-input structures. Many different scenarios presenting particular usage of the proposed multiplier structure are presented as well. The functionality of all the proposed circuits utilized in different cases is verified by using the PSpice simulation program, where 0.13 μm IBM CMOS technology parameters are employed. The simulation results show that 0.225 mW power consumption and under 3 % Total Harmonic Distortion are observed for the two-input circuit. Furthermore, the bandwidth and the dynamic range of the proposed circuit for the three-input circuit are 165 MHz and 29.54 dB, respectively.